0.1 |
outputs the order, V in .TRAN and dB/deg in .AC , active at all times; |
0.2 |
in .TRAN , if test=1 and sim=<simulation time> , it outputs the quantized weights of the windowing function, w[n] (FIR, FIRx, FIR2), or the continuous-time, custom frequency domain formula, fspl(x) (FIR_FS); |
0.3 |
in .TRAN , if test=1 and sim=<simulation time> , it outputs the quantized coefficients, h[n]; |
0.4 |
I/O pin for sampling clock, needs SH=1 . For external sync set f0 negative. It has two I/O resistances:
f0>0 |
R=1Ω |
f0<0 |
R=1GΩ |
This way, if more than one filters are in the schematic and their clocks are the same then one of them can have the master clock (f0>0 ) and the others can be driven by it (f0<0 ). |